There is known a semiconductor package having a semiconductor chip mounted on a wiring substrate by using solder. For example, in manufacturing the semiconductor package, solder may be applied to a connection terminal of the wiring substrate so that the connection terminal of the wiring substrate is connected to a connection terminal of the semiconductor chip byway of the solder. According to necessity, solder may also be applied to the connection terminal of the semiconductor chip.
A surface plating layer may be formed by performing an electroless nickel/gold plating process on a surface of the connection terminal of the wiring substrate (forming a gold plating layer on a front surface side of the connection terminal of the wiring substrate) for the purpose of, for example, improving wettability of solder. In a conventional wiring substrate, a solder resist layer is provided on the surface of the wiring substrate, and a connection terminal is exposed in an opening part formed in the solder resist layer. Because a surface plating layer need only be formed on the surface of the connection terminal exposed in the opening part, the surface plating layer rarely protrudes to an area beyond the connection terminal.
However, due to recent size-reduction and pitch-reduction of the semiconductor package, more semiconductor chips and wiring substrates are bonded to each other by bonding a connection terminal of the wiring substrate and the connection terminal of the semiconductor chip without applying solder on the connection terminal of the wiring substrate but by applying solder only to the connection terminal of the semiconductor chip. In a case of a conventional structure where the connection terminal is exposed in the opening part formed in the solder resist layer, the connection terminal of the wiring substrate may become recessed relative to the surface of the solder resist layer by not applying solder to the connection terminal of the wiring substrate. Thus, bonding the connection terminal of the semiconductor chip to the exposed connection terminal of the wiring substrate in a recessed state may be difficult in the case where solder is applied only to the connection terminal of the semiconductor chip.
Therefore, in a case of performing bonding by applying solder only to the side of the semiconductor chip, the connection terminal of the wiring substrate is to be formed projecting from the surface of the wiring substrate or formed to have its surface on the same plane as the surface of the wiring substrate. In this case, a surface plating layer is to be formed on an exposed connection terminal that is not covered by the solder resist layer (see, for example, Japanese Laid-Open Patent Publication No. 2010-98098).
However, in a case where an electroless nickel plating process is performed on the exposed connection terminal that is not covered by the solder resist layer, electroless nickel plating may protrude to an area between adjacent connection terminals of the wiring substrate and lead to short-circuiting between the adjacent connection terminals. Thus, reducing the pitch of the connection terminals is difficult.
In order to achieve pitch-reduction, it is possible to use a surface process method that does not form a nickel layer instead of using the electroless nickel plating process. For example, the surface process method may be an electroless gold plating process, an OSP (Organic Solderability Preservative) process, or an electroless palladium/gold plating process. However, in a case where solder containing tin is used to solder, for example, a semiconductor chip to a wiring substrate without a nickel layer formed on its surface, mutual diffusion between each connection terminal (e.g., copper) and the tin contained in the solder may be accelerated and lead to degradation of bonding reliability between the wiring substrate and the semiconductor chip.
As a process for preventing electroless nickel plating from protruding, there is a process of inactivating or removing a catalyst (e.g., palladium) which may cause the protruding of the electroless nickel plating. However, this process is insufficient for achieving pitch-reduction. This process may also prevent the electroless nickel plating from adhering on the wiring substrate or degrade its film quality due to an additive adhered on the surface of the wiring substrate during the process of removing the catalyst.
Thus, it is difficult for a conventional wiring substrate to achieve pitch-reduction of connection terminals while maintaining a reliable solder bonding performance.